Wifly Driver  V1.0
uart.c
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1 /***********************************************************************
2  * $Id:: $
3  *
4  * Project: uart: Simple UART echo for LPCXpresso 1700
5  * File: uart.c
6  * Description:
7  * LPCXpresso Baseboard uses pins mapped to UART3 for
8  * its USB-to-UART bridge. This application simply echos
9  * all characters received.
10  *
11  ***********************************************************************
12  * Software that is described herein is for illustrative purposes only
13  * which provides customers with programming information regarding the
14  * products. This software is supplied "AS IS" without any warranties.
15  * NXP Semiconductors assumes no responsibility or liability for the
16  * use of the software, conveys no license or title under any patent,
17  * copyright, or mask work right to the product. NXP Semiconductors
18  * reserves the right to make changes in the software without
19  * notification. NXP Semiconductors also make no representation or
20  * warranty that such application will be suitable for the specified
21  * use without further testing or modification.
22  **********************************************************************/
23 
24 /*****************************************************************************
25  * History
26  * 2010.07.01 ver 1.01 Added support for UART3, tested on LPCXpresso 1700
27  * 2009.05.27 ver 1.00 Prelimnary version, first Release
28  *
29 ******************************************************************************/
30 #include "LPC17xx.h"
31 
32 #include "type.h"
33 #include "uart.h"
34 #include "Config.h"
35 
36 #include "FreeRTOS.h"
37 #include <task.h>
38 
39 #include <string.h>
40 
41 #define BUFSIZE (BUFSIZE_WIFLY)
42 
44 volatile uint8_t UART0TxEmpty = 1, UART1TxEmpty = 1, UART2TxEmpty = 1, UART3TxEmpty=1;
46 volatile uint32_t UART0Count = 0, UART1Count = 0, UART2Count = 0, UART3Count = 0;
47 
48 /*****************************************************************************
49 ** Function name: UART0_IRQHandler
50 **
51 ** Descriptions: UART0 interrupt handler
52 **
53 ** parameters: None
54 ** Returned value: None
55 **
56 *****************************************************************************/
57 void UART0_IRQHandler (void)
58 {
59  uint8_t IIRValue, LSRValue;
60  uint8_t Dummy = Dummy;
61 
62  IIRValue = LPC_UART0->IIR;
63 
64  IIRValue >>= 1; /* skip pending bit in IIR */
65  IIRValue &= 0x07; /* check bit 1~3, interrupt identification */
66  if ( IIRValue == IIR_RLS ) /* Receive Line Status */
67  {
68  LSRValue = LPC_UART0->LSR;
69  /* Receive Line Status */
70  if ( LSRValue & (LSR_OE|LSR_PE|LSR_FE|LSR_RXFE|LSR_BI) )
71  {
72  /* There are errors or break interrupt */
73  /* Read LSR will clear the interrupt */
74  UART0Status = LSRValue;
75  Dummy = LPC_UART0->RBR; /* Dummy read on RX to clear
76  interrupt, then bail out */
77  return;
78  }
79  if ( LSRValue & LSR_RDR ) /* Receive Data Ready */
80  {
81  /* If no error on RLS, normal ready, save into the data buffer. */
82  /* Note: read RBR will clear the interrupt */
83  UART0Buffer[UART0Count] = LPC_UART0->RBR;
84  UART0Count++;
85  if ( UART0Count == BUFSIZE )
86  {
87  UART0Count = 0; /* buffer overflow */
88  }
89  }
90  }
91  else if ( IIRValue == IIR_RDA ) /* Receive Data Available */
92  {
93  /* Receive Data Available */
94  UART0Buffer[UART0Count] = LPC_UART0->RBR;
95  UART0Count++;
96  if ( UART0Count == BUFSIZE )
97  {
98  UART0Count = 0; /* buffer overflow */
99  }
100  }
101  else if ( IIRValue == IIR_CTI ) /* Character timeout indicator */
102  {
103  /* Character Time-out indicator */
104  UART0Status |= 0x100; /* Bit 9 as the CTI error */
105  }
106  else if ( IIRValue == IIR_THRE ) /* THRE, transmit holding register empty */
107  {
108  /* THRE interrupt */
109  LSRValue = LPC_UART0->LSR; /* Check status in the LSR to see if
110  valid data in U0THR or not */
111  if ( LSRValue & LSR_THRE )
112  {
113  UART0TxEmpty = 1;
114  }
115  else
116  {
117  UART0TxEmpty = 0;
118  }
119  }
120 }
121 
122 /*****************************************************************************
123 ** Function name: UART1_IRQHandler
124 **
125 ** Descriptions: UART1 interrupt handler
126 **
127 ** parameters: None
128 ** Returned value: None
129 **
130 *****************************************************************************/
131 void UART1_IRQHandler (void)
132 {
133  uint8_t IIRValue, LSRValue;
134  uint8_t Dummy = Dummy;
135 
136  IIRValue = LPC_UART1->IIR;
137 
138  IIRValue >>= 1; /* skip pending bit in IIR */
139  IIRValue &= 0x07; /* check bit 1~3, interrupt identification */
140  if ( IIRValue == IIR_RLS ) /* Receive Line Status */
141  {
142  LSRValue = LPC_UART1->LSR;
143  /* Receive Line Status */
144  if ( LSRValue & (LSR_OE|LSR_PE|LSR_FE|LSR_RXFE|LSR_BI) )
145  {
146  /* There are errors or break interrupt */
147  /* Read LSR will clear the interrupt */
148  UART1Status = LSRValue;
149  Dummy = LPC_UART1->RBR; /* Dummy read on RX to clear
150  interrupt, then bail out */
151  return;
152  }
153  if ( LSRValue & LSR_RDR ) /* Receive Data Ready */
154  {
155  /* If no error on RLS, normal ready, save into the data buffer. */
156  /* Note: read RBR will clear the interrupt */
157  UART1Buffer[UART1Count] = LPC_UART1->RBR;
158  UART1Count++;
159  if ( UART1Count == BUFSIZE )
160  {
161  UART1Count = 0; /* buffer overflow */
162  }
163  }
164  }
165  else if ( IIRValue == IIR_RDA ) /* Receive Data Available */
166  {
167  /* Receive Data Available */
168  UART1Buffer[UART1Count] = LPC_UART1->RBR;
169  UART1Count++;
170  if ( UART1Count == BUFSIZE )
171  {
172  UART1Count = 0; /* buffer overflow */
173  }
174  }
175  else if ( IIRValue == IIR_CTI ) /* Character timeout indicator */
176  {
177  /* Character Time-out indicator */
178  UART1Status |= 0x100; /* Bit 9 as the CTI error */
179  }
180  else if ( IIRValue == IIR_THRE ) /* THRE, transmit holding register empty */
181  {
182  /* THRE interrupt */
183  LSRValue = LPC_UART1->LSR; /* Check status in the LSR to see if
184  valid data in U0THR or not */
185  if ( LSRValue & LSR_THRE )
186  {
187  UART1TxEmpty = 1;
188  }
189  else
190  {
191  UART1TxEmpty = 0;
192  }
193  }
194 
195 }
196 /*****************************************************************************
197 ** Function name: UART2_IRQHandler
198 **
199 ** Descriptions: UART2 interrupt handler
200 **
201 ** parameters: None
202 ** Returned value: None
203 **
204 *****************************************************************************/
205 void UART2_IRQHandler (void)
206 {
207  uint8_t IIRValue, LSRValue;
208  uint8_t Dummy = Dummy;
209 
210  IIRValue = LPC_UART2->IIR;
211 
212  IIRValue >>= 1; /* skip pending bit in IIR */
213  IIRValue &= 0x07; /* check bit 1~3, interrupt identification */
214  if ( IIRValue == IIR_RLS ) /* Receive Line Status */
215  {
216  LSRValue = LPC_UART2->LSR;
217  /* Receive Line Status */
218  if ( LSRValue & (LSR_OE|LSR_PE|LSR_FE|LSR_RXFE|LSR_BI) )
219  {
220  /* There are errors or break interrupt */
221  /* Read LSR will clear the interrupt */
222  UART2Status = LSRValue;
223  Dummy = LPC_UART2->RBR; /* Dummy read on RX to clear
224  interrupt, then bail out */
225  return;
226  }
227  if ( LSRValue & LSR_RDR ) /* Receive Data Ready */
228  {
229  /* If no error on RLS, normal ready, save into the data buffer. */
230  /* Note: read RBR will clear the interrupt */
231  UART2Buffer[UART2Count] = LPC_UART2->RBR;
232  UART2Count++;
233  if ( UART2Count == BUFSIZE )
234  {
235  UART2Count = 0; /* buffer overflow */
236  }
237  }
238  }
239  else if ( IIRValue == IIR_RDA ) /* Receive Data Available */
240  {
241  /* Receive Data Available */
242  UART2Buffer[UART2Count] = LPC_UART2->RBR;
243  UART2Count++;
244  if ( UART2Count == BUFSIZE )
245  {
246  UART2Count = 0; /* buffer overflow */
247  }
248  }
249  else if ( IIRValue == IIR_CTI ) /* Character timeout indicator */
250  {
251  /* Character Time-out indicator */
252  UART2Status |= 0x100; /* Bit 9 as the CTI error */
253  }
254  else if ( IIRValue == IIR_THRE ) /* THRE, transmit holding register empty */
255  {
256  /* THRE interrupt */
257  LSRValue = LPC_UART2->LSR; /* Check status in the LSR to see if
258  valid data in U0THR or not */
259  if ( LSRValue & LSR_THRE )
260  {
261  UART2TxEmpty = 1;
262  }
263  else
264  {
265  UART2TxEmpty = 0;
266  }
267  }
268 
269 }
270 
271 
272 void UART3_IRQHandler (void)
273 {
274  uint8_t IIRValue, LSRValue;
275  uint8_t Dummy = Dummy;
276 
277  IIRValue = LPC_UART3->IIR;
278 
279  IIRValue >>= 1; /* skip pending bit in IIR */
280  IIRValue &= 0x07; /* check bit 1~3, interrupt identification */
281  if ( IIRValue == IIR_RLS ) /* Receive Line Status */
282  {
283  LSRValue = LPC_UART3->LSR;
284  /* Receive Line Status */
285  if ( LSRValue & (LSR_OE|LSR_PE|LSR_FE|LSR_RXFE|LSR_BI) )
286  {
287  /* There are errors or break interrupt */
288  /* Read LSR will clear the interrupt */
289  UART3Status = LSRValue;
290  Dummy = LPC_UART3->RBR; /* Dummy read on RX to clear
291  interrupt, then bail out */
292  return;
293  }
294  if ( LSRValue & LSR_RDR ) /* Receive Data Ready */
295  {
296  /* If no error on RLS, normal ready, save into the data buffer. */
297  /* Note: read RBR will clear the interrupt */
298  UART3Buffer[UART3Count] = LPC_UART3->RBR;
299  UART3Count++;
300  if ( UART3Count == BUFSIZE )
301  {
302  UART3Count = 0; /* buffer overflow */
303  }
304  }
305  }
306  else if ( IIRValue == IIR_RDA ) /* Receive Data Available */
307  {
308  /* Receive Data Available */
309  UART3Buffer[UART3Count] = LPC_UART3->RBR;
310  UART3Count++;
311  if ( UART3Count == BUFSIZE )
312  {
313  UART3Count = 0; /* buffer overflow */
314  }
315  }
316  else if ( IIRValue == IIR_CTI ) /* Character timeout indicator */
317  {
318  /* Character Time-out indicator */
319  UART3Status |= 0x100; /* Bit 9 as the CTI error */
320  }
321  else if ( IIRValue == IIR_THRE ) /* THRE, transmit holding register empty */
322  {
323  /* THRE interrupt */
324  LSRValue = LPC_UART3->LSR; /* Check status in the LSR to see if
325  valid data in U0THR or not */
326  if ( LSRValue & LSR_THRE )
327  {
328  UART3TxEmpty = 1;
329  }
330  else
331  {
332  UART3TxEmpty = 0;
333  }
334  }
335 }
336 
337 
338 
339 uint32_t UARTInit( uint32_t PortNum, uint32_t baudRate )
340 {
341  uint32_t Fdiv;
342  uint32_t pclkdiv, pclk;
343 
344  if ( PortNum == 0 )
345  {
346  LPC_PINCON->PINSEL0 &= ~0x000000F0;
347  LPC_PINCON->PINSEL0 |= 0x00000050; /* RxD0 is P0.3 and TxD0 is P0.2 */
348  /* By default, the PCLKSELx value is zero, thus, the PCLK for
349  all the peripherals is 1/4 of the SystemFrequency. */
350  /* Bit 6~7 is for UART0 */
351  pclkdiv = (LPC_SC->PCLKSEL0 >> 6) & 0x03;
352  switch ( pclkdiv )
353  {
354  case 0x00:
355  default:
356  pclk = SystemCoreClock/4;
357  break;
358  case 0x01:
359  pclk = SystemCoreClock;
360  break;
361  case 0x02:
362  pclk = SystemCoreClock/2;
363  break;
364  case 0x03:
365  pclk = SystemCoreClock/8;
366  break;
367  }
368 
369  LPC_UART0->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
370  Fdiv = ( pclk / 16 ) / baudRate ; /*baud rate */
371  LPC_UART0->DLM = Fdiv / 256;
372  LPC_UART0->DLL = Fdiv % 256;
373  LPC_UART0->LCR = 0x03; /* DLAB = 0 */
374  LPC_UART0->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
375 
376  NVIC_EnableIRQ(UART0_IRQn);
377 
378  LPC_UART0->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART0 interrupt */
379  return (TRUE);
380  }
381  else if ( PortNum == 1 )
382  {
383  LPC_PINCON->PINSEL4 &= ~0x0000000F;
384  LPC_PINCON->PINSEL4 |= 0x0000000A; /* Enable RxD1 P2.1, TxD1 P2.0 */
385 
386  /* By default, the PCLKSELx value is zero, thus, the PCLK for
387  all the peripherals is 1/4 of the SystemFrequency. */
388  /* Bit 8,9 are for UART1 */
389  pclkdiv = (LPC_SC->PCLKSEL0 >> 8) & 0x03;
390  switch ( pclkdiv )
391  {
392  case 0x00:
393  default:
394  pclk = SystemCoreClock/4;
395  break;
396  case 0x01:
397  pclk = SystemCoreClock;
398  break;
399  case 0x02:
400  pclk = SystemCoreClock/2;
401  break;
402  case 0x03:
403  pclk = SystemCoreClock/8;
404  break;
405  }
406 
407  LPC_UART1->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
408  Fdiv = ( pclk / 16 ) / baudRate ; /*baud rate */
409  LPC_UART1->DLM = Fdiv / 256;
410  LPC_UART1->DLL = Fdiv % 256;
411  LPC_UART1->LCR = 0x03; /* DLAB = 0 */
412  LPC_UART1->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
413 
414  NVIC_EnableIRQ(UART1_IRQn);
415 
416  LPC_UART1->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART1 interrupt */
417  return (TRUE);
418  }
419  else if ( PortNum == 2 )
420  {
421  LPC_PINCON->PINSEL0 &= ~0x00F00000;
422  LPC_PINCON->PINSEL0 |= 0x00A00000; /* Enable RxD2 P0.9, TxD2 P0.10 */
423  LPC_SC->PCONP |= 1<<24;//Enable PCUART2
424 
425  /* By default, the PCLKSELx value is zero, thus, the PCLK for
426  all the peripherals is 1/4 of the SystemFrequency. */
427  /* Bit 16,17 are for UART2 */
428  pclkdiv = (LPC_SC->PCLKSEL1 >> 16) & 0x03;
429  switch ( pclkdiv )
430  {
431  case 0x00:
432  default:
433  pclk = SystemCoreClock/4;
434  break;
435  case 0x01:
436  pclk = SystemCoreClock;
437  break;
438  case 0x02:
439  pclk = SystemCoreClock/2;
440  break;
441  case 0x03:
442  pclk = SystemCoreClock/8;
443  break;
444  }
445 
446  LPC_UART2->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
447  Fdiv = ( pclk / 16 ) / baudRate ; /*baud rate */
448  LPC_UART2->DLM = Fdiv / 256;
449  LPC_UART2->DLL = Fdiv % 256;
450  LPC_UART2->LCR = 0x03; /* DLAB = 0 */
451  LPC_UART2->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
452 
453  NVIC_EnableIRQ(UART1_IRQn);
454 
455  LPC_UART2->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART1 interrupt */
456  return (TRUE);
457  }
458  else if ( PortNum == 3 )
459  {
460  LPC_PINCON->PINSEL0 &= ~0x0000000F;
461  LPC_PINCON->PINSEL0 |= 0x0000000A; /* RxD3 is P0.1 and TxD3 is P0.0 */
462  LPC_SC->PCONP |= 1<<4 | 1<<25; //Enable PCUART1
463  /* By default, the PCLKSELx value is zero, thus, the PCLK for
464  all the peripherals is 1/4 of the SystemFrequency. */
465  /* Bit 6~7 is for UART3 */
466  pclkdiv = (LPC_SC->PCLKSEL1 >> 18) & 0x03;
467  switch ( pclkdiv )
468  {
469  case 0x00:
470  default:
471  pclk = SystemCoreClock/4;
472  break;
473  case 0x01:
474  pclk = SystemCoreClock;
475  break;
476  case 0x02:
477  pclk = SystemCoreClock/2;
478  break;
479  case 0x03:
480  pclk = SystemCoreClock/8;
481  break;
482  }
483  LPC_UART3->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
484  Fdiv = ( pclk / 16 ) / baudRate ; /*baud rate */
485  LPC_UART3->DLM = Fdiv / 256;
486  LPC_UART3->DLL = Fdiv % 256;
487  LPC_UART3->LCR = 0x03; /* DLAB = 0 */
488  LPC_UART3->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
489 
490  NVIC_EnableIRQ(UART3_IRQn);
491 
492  LPC_UART3->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART3 interrupt */
493  return (TRUE);
494  }
495  return( FALSE );
496 }
497 
498 uint32_t UARTClose( uint8_t PortNum)
499 {
500 
501  if ( PortNum == 0 )
502  {
503  LPC_PINCON->PINSEL0 &= ~0x000000F0;
504  /* Disable interruptions*/
505  LPC_UART0->IER = 0;
506  NVIC_DisableIRQ(UART0_IRQn);
507  return (TRUE);
508  }
509  else if ( PortNum == 1 )
510  {
511  LPC_PINCON->PINSEL4 &= ~0x0000000F;
512  /* Disable interruptions*/
513  LPC_UART1->IER = 0;
514  NVIC_DisableIRQ(UART1_IRQn);
515  return (TRUE);
516  }
517  else if ( PortNum == 2 )
518  {
519  LPC_PINCON->PINSEL0 &= ~0x00F00000;
520  LPC_SC->PCONP &= ~1<<24;
521  /* Disable interruptions*/
522  LPC_UART2->IER = 0;
523  NVIC_DisableIRQ(UART2_IRQn);
524  return (TRUE);
525  }
526  else if ( PortNum == 3 )
527  {
528  LPC_PINCON->PINSEL0 &= ~0x0000000F;
529  LPC_SC->PCONP &= ~(1<<4 | 1<<25);
530  /* Disable interruptions*/
531  LPC_UART3->IER = 0;
532  NVIC_DisableIRQ(UART3_IRQn);
533  return (TRUE);
534  }
535  return( FALSE );
536 }
537 
538 void UARTSend( uint32_t portNum, uint8_t *BufferPtr, uint32_t Length )
539 {
540  if ( portNum == 0 )
541  {
542  while ( Length != 0 )
543  {
544  /* THRE status, contain valid data */
545  while ( !(UART0TxEmpty & 0x01) );
546  LPC_UART0->THR = *BufferPtr;
547  UART0TxEmpty = 0; /* not empty in the THR until it shifts out */
548  BufferPtr++;
549  Length--;
550  }
551  }
552  else if (portNum == 1)
553  {
554  while ( Length != 0 )
555  {
556  /* THRE status, contain valid data */
557  while ( !(UART1TxEmpty & 0x01) );
558  LPC_UART1->THR = *BufferPtr;
559  UART1TxEmpty = 0; /* not empty in the THR until it shifts out */
560  BufferPtr++;
561  Length--;
562  }
563  }
564  else if ( portNum == 2 )
565  {
566  while ( Length != 0 )
567  {
568  /* THRE status, contain valid data */
569  while ( !(UART2TxEmpty & 0x01) );
570  LPC_UART2->THR = *BufferPtr;
571  UART2TxEmpty = 0; /* not empty in the THR until it shifts out */
572  BufferPtr++;
573  Length--;
574  }
575  }
576  else if ( portNum == 3 )
577  {
578  while ( Length != 0 )
579  {
580  /* THRE status, contain valid data */
581  while ( !(UART3TxEmpty & 0x01) );
582  LPC_UART3->THR = *BufferPtr;
583  UART3TxEmpty = 0; /* not empty in the THR until it shifts out */
584  BufferPtr++;
585  Length--;
586  }
587  }
588  return;
589 }
590 
591 
592 int UARTReceive(uint8_t portNum, char* string, uint32_t timeout)
593 {
594  int oldCount=0;
595  int newCount=0;
596 
597  clearBuffUart(portNum);
598  if ( portNum == 0 )
599  {
600 
601  //UART0Count = 0; // clean buff
602  LPC_UART0->IER = IER_THRE | IER_RLS | IER_RBR; // enable interrupt RX UART3
603  // todo: improve it
604  delayMs(timeout,DELAY_MODE); // wait sometime for receive some commands
605  do{
606  oldCount = newCount;
607  delayMs(10,DELAY_MODE);
608  newCount = UART0Count;
609  }while(oldCount != newCount); // wait a little time while we have new chars
610  LPC_UART0->IER = IER_THRE | IER_RLS; // disable interrupt RX UART0
611  strncpy(string,(const char*)UART0Buffer , newCount );
612  }
613  else if (portNum == 1)
614  {
615  //UART1Count = 0; // clean buff
616  LPC_UART1->IER = IER_THRE | IER_RLS | IER_RBR; // enable interrupt RX UART3
617  // todo: improve it
618  delayMs(timeout,DELAY_MODE); // wait sometime for receive some commands
619  do{
620  oldCount = newCount;
621  delayMs(10,DELAY_MODE);
622  newCount = UART1Count;
623  }while(oldCount != newCount); // wait a little time while we have new chars
624  LPC_UART1->IER = IER_THRE | IER_RLS; // disable interrupt RX UART1
625  strncpy(string,(const char*)UART1Buffer , newCount );
626  }
627  else if ( portNum == 2 )
628  {
629  //UART3Count = 0; // clean buff
630  LPC_UART2->IER = IER_THRE | IER_RLS | IER_RBR; // enable interrupt RX UART3
631  // todo: improve it
632  delayMs(timeout,DELAY_MODE); // wait sometime for receive some commands
633  do{
634  oldCount = newCount;
635  delayMs(10,DELAY_MODE);
636  newCount = UART2Count;
637  }while(oldCount != newCount); // wait a little time while we have new chars
638  LPC_UART2->IER = IER_THRE | IER_RLS; // disable interrupt RX UART3
639  strncpy(string,(const char*)UART2Buffer , newCount );
640  }
641  else if ( portNum == 3 )
642  {
643  //UART3Count = 0; // clean buff
644  LPC_UART3->IER = IER_THRE | IER_RLS | IER_RBR; // enable interrupt RX UART3
645  // todo: improve it
646  delayMs(timeout,DELAY_MODE); // wait sometime for receive some commands
647  do{
648  oldCount = newCount;
649  delayMs(10,DELAY_MODE);
650  newCount = UART3Count;
651  }while(oldCount != newCount); // wait a little time while we have new chars
652  LPC_UART3->IER = IER_THRE | IER_RLS; // disable interrupt RX UART3
653  strncpy(string,(const char*)UART3Buffer , newCount );
654  }
655 
656  string[newCount] = 0; // add end string. Now we have a string
657  clearBuffUart(portNum);
658  return newCount;
659 }
660 
661 __attribute__((optimize("O0"))) void delayMs( uint32_t ms, uint8_t type)
662 {
663  if (type==0)
664  {
665  int i;
666  int x=0;
667  //7140 iterations are 1ms aprox (it's a vulgar implementation)
668  for(i = 0; i < ( ((uint32_t)7140)*ms); i++){
669  x++;
670  }
671  }else
672  {
673  const int delay = ms / portTICK_RATE_MS;
674  vTaskDelay(delay);
675  }
676 return;
677 }
678 
679 
680 void clearBuffUart(uint8_t portNum)
681 {
682  if ( portNum == 0 )
683  {
684  UART0Count = 0; // clean buff
685  memset((uint8_t *)UART0Buffer, 0x00, BUFSIZE);
686  }
687  else if ( portNum == 1 )
688  {
689  UART1Count = 0; // clean buff
690  memset((uint8_t *)UART1Buffer, 0x00, BUFSIZE);
691  }
692  else if ( portNum == 2 )
693  {
694  UART2Count = 0; // clean buff
695  memset((uint8_t *)UART2Buffer, 0x00, BUFSIZE);
696  }
697  else if ( portNum == 3 )
698  {
699  UART3Count = 0; // clean buff
700  memset((uint8_t *)UART3Buffer, 0x00, BUFSIZE);
701  }
702 
703 }
704 /******************************************************************************
705 ** End Of File
706 ******************************************************************************/
#define IIR_RDA
Definition: uart.h:39
volatile uint8_t UART1Buffer[BUFSIZE]
Definition: uart.c:45
void delayMs(uint32_t ms, uint8_t type)
volatile uint32_t UART2Count
Definition: uart.c:46
volatile uint8_t UART0TxEmpty
Definition: uart.c:44
void UART2_IRQHandler(void)
Definition: uart.c:205
#define LSR_PE
Definition: uart.h:45
volatile uint8_t UART2TxEmpty
Definition: uart.c:44
volatile uint8_t UART3Buffer[BUFSIZE]
Definition: uart.c:45
#define FALSE
Definition: type.h:22
volatile uint32_t UART0Status
Definition: uart.c:43
volatile uint8_t UART0Buffer[BUFSIZE]
Definition: uart.c:45
#define TRUE
Definition: type.h:26
volatile uint32_t UART3Status
Definition: uart.c:43
#define LSR_BI
Definition: uart.h:47
#define IER_RLS
Definition: uart.h:35
volatile uint32_t UART0Count
Definition: uart.c:46
uint32_t UARTInit(uint32_t PortNum, uint32_t baudRate)
Definition: uart.c:339
void clearBuffUart(uint8_t portNum)
Definition: uart.c:680
uint32_t UARTClose(uint8_t PortNum)
Definition: uart.c:498
volatile uint8_t UART3TxEmpty
Definition: uart.c:44
void UART3_IRQHandler(void)
Definition: uart.c:272
#define IER_THRE
Definition: uart.h:34
#define IER_RBR
Definition: uart.h:33
void UART0_IRQHandler(void)
Definition: uart.c:57
void UART1_IRQHandler(void)
Definition: uart.c:131
volatile uint32_t UART2Status
Definition: uart.c:43
volatile uint8_t UART1TxEmpty
Definition: uart.c:44
#define LSR_OE
Definition: uart.h:44
#define BUFSIZE
Definition: uart.c:41
__attribute__((optimize("O0")))
Definition: uart.c:661
volatile uint32_t UART1Status
Definition: uart.c:43
int UARTReceive(uint8_t portNum, char *string, uint32_t timeout)
Definition: uart.c:592
volatile uint8_t UART2Buffer[BUFSIZE]
Definition: uart.c:45
#define IIR_RLS
Definition: uart.h:38
#define DELAY_MODE
Definition: uart.h:53
#define IIR_THRE
Definition: uart.h:41
void UARTSend(uint32_t portNum, uint8_t *BufferPtr, uint32_t Length)
Definition: uart.c:538
#define IIR_CTI
Definition: uart.h:40
#define LSR_FE
Definition: uart.h:46
volatile uint32_t UART3Count
Definition: uart.c:46
#define LSR_THRE
Definition: uart.h:48
#define LSR_RXFE
Definition: uart.h:50
volatile uint32_t UART1Count
Definition: uart.c:46
#define LSR_RDR
Definition: uart.h:43